Software pipelined loops Samples
stage 1:(p16)ld4 r4 = [r5],4
stage 2:(p17)--- // empty stage
stage 3:(p18)add r7 = r4,r9
stage 4:(p19)st4 [r6] = r7,4
mov lc = 199 // LC =loop count - 1
mov ec = 4 // EC =epilog stages + 1
mov pr.rot = 1<<16;; // PR16 = 1, rest = 0
L1:
(p16)ld4 r32 = [r5],4 // Cycle 0
(p18)add r35 = r34,r9 // Cycle 0
(p19)st4 [r6] = r36,4 // Cycle 0
br.ctop L1;; // Cycle 0
page revision: 0, last edited: 22 Nov 2006 22:51